AMD revealed the HBM memory for next gen graphics

AMD just announced what I would call the first step in introducing the new graphics card generation. Today AMD revealed a new type of memory, namely HBM ( High Bandwidth Memory) which is a new type of power-efficient solution with ultra-wide communication lanes to serve the needs of fast GPUs and systems-on-chip (SoCs).

It is a new memory technology invented at AMD with later contributions from industry partners. HBM is also a radically new way to densely configure memory on a GPU or SoC, accomplished by stacking chips vertically like floors in a building rather than laid out across a large area like traditional RAM.


GDDR5 is also an AMD-invented technology, often configured on modern graphics cards as 8 or 16 memory chips individually laid out over a surface area. Each chip requires its own wiring to provide 32 lanes of communication to the graphics core. The communication between the GPU and the memory happens across these lanes at speeds up to 1750MHz. With all the chips combined, a typical high-end GPU might have 4-8GB of GDDR5 providing over 300 gigabytes per second of bandwidth.

However, GDDR5's wiring complexity and physical distance from the graphics core places limits on the power efficiency and bandwidth that can be practically delivered to faster processors, SoCs or graphics cores. GDDR5's size demands also place practical limits on how small a high-end GPU can be.

HBM does away with the demanding space requirements of GDDR5 by growing upwards in the third dimension rather than outwards. HBM accomplishes this by stacking multiple memory chips vertically, much like floors in a skyscraper. These memory chips speak to each other through microscopic wires called "through-silicon vias," or TSVs. TSVs run up and down the memory stack providing data and power to each memory chip along the way.

AMD HBM GPU connection

An HBM-based device has up to four of these memory stacks, each offering 1024 communication lanes to the graphics chip at speeds around 500MHz. The lower frequency of HBM (circa 500MHz vs. 1750MHz on GDDR5) saves power, while the wider per-chip communication (1024 vs. 32) better meets the needs of a highly parallelized GPU. With all of these stacks combined, a typical HBM-based GPU would have 4GB of RAM providing over 450 gigabytes per second of bandwidth.

These memory stacks are connected to a small plate of silicon called the "interposer," to which the GPU core is also connected.

AMD HBM interposer

HBM stacks and the GPU are linked through the interposer with many microscopically short connections, rather than the long and bulky wiring of GDDR5. The entire interposer module is connected to a graphics card's circuit board, and the spaced saved by collapsing the memory and GPU onto a single small module can be used to explore new GPU form factors.

By most every memory metric, HBM is a superior memory technology to GDDR5. HBM offers a GPU more bandwidth with less power usage than GDDR5, and does so in 19x less surface area than GDDR5 requires. HBM reduces the area on PCB from 672mm (GDDR5) to less than 35mm2 for 1GB.

It also uses only 1.3V against 1.5V+ of GDDR5. HBM Power efficiency is more than 35GB/s per watt while GDDR5 can do only 10.66GB/s bandwidth per watt.

Effectively, GDDR5 requires more power and more space in order to keep a high bandwidth interface. That means bigger power regulators on PCB and, respectively, big cards. This is a huge advantage of HBM: less space, smaller cards.

Here are the numbers:





672mm2 for 1GB

35mm2 for 1GB





Up to 28GB/s



Up to 10.6 GB/s per watt

>35GB/s per watt





Up to 1750MHz

Up to 500MHz

HBM is also an excellent candidate to replace the DDR-type memory found in desktops and notebooks for the same reasons: power efficiency, space savings and performance. Both the CPU and GPU cores in a SoC stand to benefit from HBM as a memory technology that can deliver all-around improvements in the form factors expected of a SoC.

HBM is now managed and licensed by JEDEC, an independent organization that oversees open PC industry standards.

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