Altera Corporation today announced that its Stratix 10 SoC devices, manufactured on Intel's 14 nm Tri-Gate process, will incorporate a high-performance, quad-core 64-bit ARM Cortex-A53 processor system, complementing the device's floating-point digital signal processing (DSP) blocks and high-performance FPGA fabric. Coupled with Altera's advanced system-level design tools, including OpenCL, this versatile heterogeneous computing platform is designed for a broad range of applications, including data center computing acceleration, radar systems and communications infrastructure.
The ARM Cortex-A53 processor, the first 64-bit processor used on a SoC FPGA, is used in Stratix 10 SoCs due to its performance, power efficiency, data throughput and advanced features. The Cortex-A53 is among the most power efficient of ARM's application-class processors, and when delivered on the 14 nm Tri-Gate process will achieve more than six times more data throughput compared to today's highest performing SoC FPGAs. The Cortex-A53 also delivers important features, such as virtualization support, 256TB memory reach and error correction code (ECC) on L1 and L2 caches. Furthermore, the Cortex-A53 core can run in 32-bit mode, which will run Cortex-A9 operating systems and code unmodified, allowing a smooth upgrade path from Altera's 28 nm and 20 nm SoC FPGAs.
"ARM is pleased to see Altera adopting the lowest power 64-bit architecture as an ideal complement to DSP and FPGA processing elements to create a cutting-edge heterogeneous computing platform," said Tom Cronk, executive vice president and general manager, Processor Division, ARM. "The Cortex-A53 processor delivers industry-leading power efficiency and outstanding performance levels, and it is supported by the ARM ecosystem and its innovative software community."
Leveraging Intel's 14 nm Tri-Gate process and an enhanced high-performance architecture, Altera Stratix 10 SoCs will have a programmable-logic performance level of more than 1GHz; two times the core performance of current high-end 28 nm FPGAs.
By standardizing on ARM processors across its three-generation SoC portfolio, Altera will offer software compatibility and a common ARM ecosystem of tools and operating system support. Embedded developers will be able to accelerate debug cycles with Altera's SoC Embedded Design Suite (EDS) featuring theARM Development Studio 5 (DS-5™) Altera® Edition toolkit, the industry's only FPGA-adaptive debug tool, as well as use Altera's software development kit (SDK) for OpenCL to create heterogeneous implementations using the OpenCL high-level design language.